1. Field of the Invention
The present invention relates to semiconductor devices, and more specifically to a method and apparatus for lithographic resolution enhancement in logic device processing technologies.
2. Background Information
In the semiconductor industry, semiconductor devices are fabricated by forming several devices layers on a semiconductor substrate using lithographic methods to define the pattern of each layer. In conventional lithography, an exposure is performed using a single reticle exposed by a radiation source which irradiates the reticle at an angle perpendicular to the plane of the reticle. The resolution, which is typically defined as the smallest distance two features can be spaced apart while removing all photoresist between the features, is equal to: ##EQU1## where .lambda. is the wavelength of the exposing radiation, NA is the numerical aperture of the lens, and k.sub.1 is a process dependent constant typically having a value of approximately 0.7. As can be seen from the above equation, the conventional resolution can be increased by using a smaller wavelength radiation source, and by using a lens with a larger NA. While both approaches have increased the resolution, there are several drawbacks. For example, since the depth of focus is proportional to .lambda./NA.sup.2, decreasing the wavelength, and, to a greater extent increasing the numerical aperture, decreases the depth of focus. Additionally, other problems exist, such as the increased expense and complexity of systems with a large NA, and the long exposure times required for short wavelength (e.g., X-ray) photoresists. Therefore, several techniques have been developed to enhance the resolution of conventional lithography to allow for the formation of patterned resist layers with smaller dimensions than that achievable with conventional methods. One method, called oblique illumination, illuminates a reticle from an oblique angle instead of the 90.degree. angle used in conventional lithography. In this method the system is configured so that the aperture captures the zero and only one first order diffraction node of closely spaced features, in contrast to a conventional system which captures the zero order and both first order diffraction nodes. Thus, the oblique system is able to capture a zero and first order diffraction node separated by a larger angle than a conventional system. Since an inverse relationship exists between the pitch of a structure to be imaged and the angular distribution between the zero and the first order diffraction node of the scattered light, the oblique system is able to collect light from diffraction nodes separated by a larger angle to produce an image of smaller features, thus demonstrating higher resolution. Additionally, the depth of focus is enhanced because both the zero and the first order diffraction node collected by a projection system that utilizes oblique illumination has the same optical path at positions displaced from the focal plane. Another method of enhancing the resolution of conventional lithography is the use of phase-shifted masks (PSM). In a PSM mask, all features are surrounded by light transmitting regions which shift the phase of the transmitted light by 180.degree. compared to the feature. In this way, the diffraction fringes at the edges of the features are effectively canceled, resulting in a better image contrast. Another method of enhancing lithographic resolution is called pupil filtering which involves modulating the phase properties of the exposing radiation through use of an optical element in the lens.
The resolution of both conventional and enhanced resolution lithographic processes is better for periodic features, such as those found in memory devices such as DRAM's, for example. The reason for this is that a greater percentage of the exposing radiation is contained in the diffraction nodes of periodic structures compared to that contained in the diffraction nodes of isolated features. It is these diffraction nodes which contain all spatial information of the features. The result is that periodic features of a given size have better contrast then isolated features, so that an exposure dose exists which will result in complete exposure of spaces without overexposure of lines. For example, FIG. 1 shows an aerial plot of intensity under a reticle 101 having isolated feature 102 and periodic features 103a-103c having a dimension near the resolution limit of the process. As can be seen, the difference in intensity between masked and unmasked regions (i.e., the contrast) is much greater for the periodic features 103a-103c (curve 113) than for an isolated feature 102 (curve 112). Therefore, for a given combination of exposing conditions, at some dimension isolated feature 102 cannot be resolved simultaneously with periodic features 103 that are within the resolution limit of the process. In addition to the increased resolution achievable on periodic structures, periodic structures typically have less variation in linewidth due to varying defocus. Thus, over the surface of a wafer, periodic structures exhibit a much tighter distribution of linewidths than do isolated structures. The difference between the projected image of periodic and isolated lines of the same size causes a difference in the size of these lines when their image is formed in the resist (called the proximity effect) thus causing a wider than desirable variation of the linewidth.
As mentioned above, the contrast and resolution of periodic features using either conventional or enhanced techniques remains better than that of isolated features. Unfortunately, most logic devices do not have periodic structures. Rather, such devices have numerous randomly spaced and isolated features, such as gates, which are, for optical purposes, laid out randomly across the device. Thus, the resolution for these devices is limited. FIG. 2 shows an example of multiple polysilicon lines 201, 202, 204, 205, and 206. Portions of polysilicon lines 201 and 202 form gates 201b and 202b over diffusion region 203. While, depending on the layout, portions of the polysilicon lines such as 201a, 204, 205, and others, may be periodic, other portions such as the portions forming gates 201b and 202b are not surrounded sufficiently close by other polysilicon lines to provide the necessary periodicity for maximum resolution. Therefore, a layer such as the first polysilicon (poly 1) layer from which the lines 201 and 202, including gates 201b and 202b, are formed, is drawn with the minimum dimension that will provide manufacturing worthy image contrast on isolated features. Thus, the transistors have a drawn channel length at the minimum dimension that can be achieved on isolated structures which, as described above, is greater than the minimum dimension which can be achieved on a layer having only periodic structures. As is well known, a small channel length is desirable to achieve higher device performance.
What is needed is a method and apparatus for achieving improved lithographic resolution on isolated structures. The method and apparatus should allow for fabrication of, for example, isolated transistors with reduced dimension gates and improved performance. The method and apparatus should also reduce or eliminate the proximity effect in the fabrication of layers with both periodic and randomly spaced lines. What is further needed is a method of providing a device layer layout having features or portions of features of the desired size.